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Release Notes - Memtest86 7.4 Free Edition

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Di seguito sono consultabili le note di rilascio - in gergo "release notes" - relative al file Memtest86 7.4 Free Edition, nel caso in cui gli sviluppatori abbiano reso disponibile tale documentazione in occasione della pubblicazione del software. Tuttavia, se hai bisogno di maggiori informazioni su Memtest86 7.4 Free Edition, o se le note di rilascio non sono (ancora) disponibili, è comunque possibile procedere con la lettura della descrizione del file.
Memtest86 7.4 Free Edition
Fixes/Enhancements
  • Added new file blacklist.cfg that contains a list of baseboards that have known MemTest86 boot issues
  • Added 'CONSOLEMODE' config file parameter for specifying the mode of the UEFI console. Setting the console mode determines the resolution of the console (with 0 being the minimum supported resolution of 80x25)
  • Added 'BITFADESECS' config file parameter for specifying the sleep interval in the Bit Fade test (Test 10)
  • Added language support for Catalan
  • Updated ImageUSB to version 1.3
  • Fixed 128-byte alignment issues in the random library
  • Errors detected in Test 12 (128-bit Random Number Sequence Test) are now logged as 128-bit values
  • HTML test report now includes if ECC polling was enabled
  • Fixed text artifacts appearing in the testing screen due to the text being too long
  • Fixed memory size being incorrectly reported due to including non-RAM memory ranges (eg. NVM, MMIO, Reserved)
  • Fixed main menu screen being too small due to resolution being set too high
  • Added preliminary ECC Injection support for Intel Xeon E5 chipsets
  • Added preliminary ECC Injection support for Intel D-1500 chipsets
  • Added ECC detection support for different variations of Intel Kaby Lake chipset
  • Added support for retrieving AMD Ryzen CPU info, including base and turbo clock speeds
  • Improved the performance and robustness of measuring CPU base/turbo speeds for AMD chipsets
  • Updated JEDEC RAM manufacturer ID list
  • Added reset mechanism for Intel ICH SMBus when timeout occurs while accessing SPD registers
  • Fixed DDR4 SPD data not being read for PIIX4 SMBus controllers

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